Modern integrated circuits are required to operate in very high frequencies while consuming a relatively limited amount of power. In order to reduce the power consumption of modern integrated circuits the level of voltage supply has dramatically decreased during the last decade.
This power supply voltage reduction has some drawbacks such as an increased sensitivity to voltage drops (also referred to as IR drops or droops) that are proportional to the current (I) consumed by the integrated circuit and to the resistance (R) of the conductors that are included outside the integrated circuit and inside the integrated circuit.
A voltage drop reduces the voltage that is provided to internal components of the integrated circuit and thus temporarily prevents the integrated circuit from operating in a proper manner.
U.S. Pat. No. 6,058,257 of Nojima, and U.S. patent application publication number 2004/0238850 of Kusumoto, both being incorporated herein by reference, describe apparatus, devices and methods for designing an integrated circuit such as to reduce internal voltage drops.
U.S. patent application publication number 2004/0030511 of Tien et al., being incorporated herein by reference, describes a method for evaluating (by using simulations) voltage drops.
U.S. patent application 2004/0049752 of Iwanishi et al., being incorporated herein by reference, describes an integrated circuit design process that is responsive to voltage drops.
Japanese patent application JP05021738 titled “A semiconductor integrated circuit”, being incorporated herein by reference, describes an apparatus that increases the supply voltage by a predetermined amount and during a predefined period once a certain event is detected.
There is a need to provide a device and method for efficiently compensating for voltage drops.